Arsyn Circuit Synthesis Platform for Automated Analog, RF and Digital Transistor Circuit Design
Overview
Arsyn is a powerful design space search and tradeoff analysis tool for analog/RF mixed-signal circuit design and behavioral modeling. It enables analog/RF design reuse, and the ability to gain design insights and efficiently explore the design space. A designer starts with a parametric design (e.g. a circuit where some transistors are unsized or some topologies have multiple options), and a set of design specifications (gain, noise, power). Arsyn searches the design space and produces a set of design solutions that represent the best possible design tradeoffs among design specifications.
Arsyn has been used by designers for the design and reuse of various circuits including opamps, filters, switched capacitors, phase lock-loops, I/O buffers, memory circuits, digital library cells, RF front ends, LCD driver circuits, and A/D converters; The latest success is a 12bit 4GHz A/D converter with over 6000 transistors.
Key Benefits
- Explore the best design tradeoff across multiple design objectives
- Automate the design process, enable analog/RF design reuse and improve the long-term design productivity
- Enhance analog/RF design robustness and yield
- Solve the problem of design specification uncertainty and frequent design specification challenges during the design process
- Explore the circuit topology and fabrication feasibility and limit
- Help designers gain more design insight
- Achieve more innovative design
- Facilitate analog/RF design for reuse
- Ease the design documentation effort
Key Features
- Technology independent (can handle bulk and SOI CMOS, BiCMOS, SiGe BiCMOS, precision bipolar, GaAs, PHEMY, HBT,...)
- Topology independent (can handle your own circuit topology)
- Combined global stochastic search for robustness and local deterministic search for efficiency
- Use automatic generated design equations, behavioral models or your own simulator
- Open architecture: designers can add their own simulators and scripts
- Incremental search: a designer can stop the search, modify design goals, constraints and weights, refine the search space, and resume the search without losing the previous simulation data
- Multiple objective design tradeoff analysis using Circuit Performance Radar Chart (CPRC)
- Easy parameter selection from Cadence Schematic or HSPICE/Spectre netlists
- Automatic back annotation to Cadence Schematic or HSPICE/Spectre netlists
- Perform simultaneous device sizing, topology and process selection
- Handle various design constraints include both inequality and curve matching
- Design space visualization
- Handle multiple process corners (one customer circuit uses 256 corners) and mismatching
- Run on one machine or multiple machines
